A VHDL training model of a processor

// <I>CompSysTech’ 07<D> : Proceedings of the International conference on "Computer systems and technologies and Workshop for PhD students in computing CompSysTech' 07, Rousse, 14-15 june 2007. - Rousse : Avangard print, 2007, р. VII.1-1 – VII.1-6.

N. Kostadinov; A. S. Ivanova

Детайли

Допълнителна информация

ISBN: 978-975-9641-50-9
Отрасъл: Художествена литература
Забележка: Вт. изт.: COBISS.BG-ID 1244105956 : On-line бази данни на НБ "Св. св. Кирил и Методий"
Системен №: 13224
Допълнителна сигнатура: ! 4958

Действия

APA Chicago / Turabian (16th edition) Harvard MLA (7th edition)

Kostadinov, N., Ivanova, A. A VHDL training model of a processor, , , 978-975-9641-50-9.

Kostadinov, N., Ivanova, A. . A VHDL training model of a processor. : , , 978-975-9641-50-9.

Kostadinov, N., Ivanova, A. () A VHDL training model of a processor, : , 978-975-9641-50-9

Kostadinov, N., & Ivanova, A. (). A VHDL training model of a processor. // <I>CompSysTech’ 07<D> : Proceedings of the International conference on "Computer systems and technologies and Workshop for PhD students in computing CompSysTech' 07, Rousse, 14-15 june 2007. - Rousse : Avangard print, 2007, р. VII.1-1 – VII.1-6..